例句與造句

1. Gmch graphics memory controller hub
   圖形和內(nèi)存控制中心
2. Gmch graphics memory controller hub
   圖形和內(nèi)存控制中心
3. Crossbar - based memory controller
   交叉內(nèi)存控制器
4. I guess the most notable thing is putting the memory controller on the cpu chip , which has already been done by the alpha people , and has already been shown to have upsides and downsides
   我想最值得注意的就是將存儲器控制器放到cpu芯片上，這一點開發(fā)alpha的人員已經(jīng)使用了，而且已經(jīng)表現(xiàn)出有利也有弊。
5. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ) , 5 - stage pipeline , hardware multiplier and divider , interrupt controller , 16 - bit i / o port and a flexible memory controller . new modules can easily be added using the on - chip amba ahb / apb buses . it has flexible peripheral interfaces , so can be used as an independent processor in the board - level application or as a core in the asic design
   它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：采用分離的指令和數(shù)據(jù)cache （哈佛結構） ，五級流水，硬件乘法器和除法器，中斷控制器， 16位的i / o端口和靈活的內(nèi)存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。
6. It's difficult to find memory controller in a sentence. 用memory controller造句挺難的
7. Memory controller design and ip interconnection are the common issues in system - on - a - chip ( soc ) design . having analyzed the established ip interconnection strategy and sgram characteristics , the author put forward the multi - agent momery interface interconnection strategy , defmed the interface protocol and implemented the momery interface design using finite state machines
   存儲器控制電路的設計和ip互連是soc設計中常遇到的問題。在分析了已有的ip互連機制和sgram特性后，本文給出多客戶存儲器接口的互連策略、定義了接口通信協(xié)議并且用狀態(tài)機實現(xiàn)了該接口電路的設計。
8. Based on s698 technology , obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller , etc . the bus interfaces is composed of i2c spi magnetic card interface and ic card interface . obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition
   Obt - devsys - s698是s698系列嵌入式處理器開發(fā)板中的一員，其上包括：具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器，主頻160mhz ， sram存儲器， flash存儲器具有三路uart接口，一路ps 2接口， led發(fā)光二極管控制電路，中斷操作按鈕其外擴總線包括i2c總線接口spi總線接口磁卡接口智能卡接口等。